elSoM-SDR Specifications
Transceiver
Frequency Range
70MHz to 6 GHz, with TDD and FDD support
Step Size
1KHz
Frequency Reference
Frequency Stability
Power Output
0dBm min (+/-1.5dB variation over the band)
Adjustable Output Power
0.25 dB
Tunable Bandwidth
200KHz – 56MHz
SSB Phase Noise
-80 dBc/Hz @ 1KHz offset
-90 dBc/Hz @ 10KHz offset
-105 dBc/Hz @ 100KHz offset
Harmonics Level
< -15 dBc (typical)
Spurious Level
<-60 dBc or below
Receiver Sensitivity
-90dBm
Noise Figure
<5dB
RSSI level Indication
-100dBm to 0dBm
Max RF Input Power
0dBm
ADC/DAC resolution
12 bit
AGC
Inbuilt with ±0.5dB step size
Baseband Processing
Programmable Logic Device
XC7A100T series FPGA from Xilinx Inc
FPGA Resources
5850 logic slices, each with 6 input LUTs and 8 Flip-Flops
240 DSP Slices
6 Clock Management tiles
each with PLL
4860 Kbits of Fast Block RAM
Digital Singal Processor
ADSP-Blackfin Processor from ADI
Clock rate of 600MHz 1MB Internal Memory
SDRAM
1xSDRAM 256MB | 1xSRAM 16MB
Storage
8MB SPI Flash (for Processor)
Other Interfaces
2xRS232, 1xUSB, SPORT, PPI, GPIO
Ethernet
10/100/1000 Mbps RGMII Mode
External Interfaces
Supply Voltage
5 VDC Power Adapter
RF I/O Impedance
50 Ohms
RF I/O Connector
SMA (F)
Frequency Adjustment
Through GUI
Mounting requirement
Provision for mounting the module to chassis to be
Dimension
90×95 mm
Weight
350 grams
Control Signals
20-Pin : PA interface | 50-Pin : Expansion connector
Operating Temperature
- 40.0°c to + 85.0°c
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